“Tell me and I forget,
  teach me and I may remember,
  involve me and I learn.”
– Benjamin Franklin

Backend Courses

• Physical Design
• Physical Verification
• Synthesis & STA
• Power Sign-off

DFx

• Design for Test

Frontend Courses

• ASIC RTL Design
• Design Verification - UVM/OVM
• FPGA Design

Analog Courses

• Standard Cell Design & Characterization
• AMS Verification
• Analog Design
• Analog Layout
• Standard Cell Layout
• Memory Layout

Contact Info

• Email: info@iclabs.in
• Ph/What's App: +91 80 5062 3065
• Click here to Fill the Form