“Tell me and I forget,
  teach me and I may remember,
  involve me and I learn.”
– Benjamin Franklin

Course information

• Category: VLSI Layout
• Duration: 4 to 6 Months
• Timings: 9AM to 5PM
• Mode: Offline

We guarantee your Learning and Placement

Content

•   >>   Device basics
•   >>   Layout basics, PDK
•   >>   Stick dagrams and layout techniques
•   >>   Layout matching techniques
•   >>   Area estimation and floorplan
•   >>   Bitcell Layout
•   >>   Complier
•   >>   Characterization
•   >>   Physical Verificaiton
•   >>   Layout failure machanism
•   >>  How to debug the issues during the flow
•   >>  Projects

Prerequisite

•   >>   Passion for learning
•   >>  Qualification
•     >>  Diploma (EE,EC,EI,CS,IT)
•     >>  B.Tech/BE/M.Tech/ME (EE,EC,EI,CS,IT)
•     >>  Any degree with Maths and Physics
•   >>  Failed students with lots of Passion (Let's work out a way)

Selection Process

•   >>  Analytical test
•   >>  Interview

**Get up to 50% sponsorship when you out perform in the test and interview [purely decided by sponsoring company]

Limited Seats - 1 to 1 training (pretty new right)

Training calendar

Contact Info

• Email: info@iclabs.in
• Ph/What's App: +91 80 5062 3065
• Click here to Fill the Form